WP1: Management and coordination

  D1.1 Data management plan and project hand-book

  D1.2 Interim Project Report

WP2: Spin-wave circuit design

  D2.1 Cascaded SW MAJ3 device design and optimisation

WP3: Design of mixed signal CMOS analog periphery integrated circuit

  D3.1 Test structure APIC tape-out

WP5: Interposer design and fabrication, 2.5D system integration

  D5.1 Initial STCD document

WP6: Device, circuit, and system characterisation

  D6.1 Report on SW device and circuit behaviour

WP7: Dissemination, communication, and exploitation

  D7.1 Dissemination, exploitation, and communication plan

  D7.2 First communication, dissemination, and innovation activity report

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